This invention relates to binary adder circuits.
Binary adder circuits are well known in the art. Such a circuit generally has three inputs for receiving three binary digits which are to be added together, and sum and carry outputs at which appear the results of the addition.
The object of the present invention is to provide a binary adder circuit which, as well as performing its basic function as a conventional adder, is also capable of acting as a connector, for coupling its inputs direct to its outputs. One possible use for such a dual-purpose circuit is in an array processor, as will be described below.